Abstract

In medium-voltage applications, the main issue with multilevel inverters is that they require a large number of semiconductor switches when higher voltage levels are required. The main objective of this paper is to propose a multilevel inverter topology that requires fewer semiconductor switches and lower voltage stress than other multilevel inverters. To address the limitations of existing multilevel inverters, the designed topology uses switched diode instant power switches. With twelve power switches, the proposed topology generates a 63-level in an asymmetric configuration. Based on a comparison with other reported cascaded structures, the new cascade topology produces a large number of levels with reduced power switches. The thermal loss and efficiency assessment of the proposed topology is also analyzed and presented. The performance of the proposed 63-level topology is tested and evaluated using both software and hardware results for different operation conditions.