Characterization and Modeling of 22 nm FDSOI Cryogenic RF CMOS
Abstract
Analog and RF mixed-signal cryogenic-CMOS circuits with ultrahigh gain-bandwidth product can address a range of applications such as interface circuits between superconducting (SC) single-flux quantum (SFQ) logic and cryo-dynamic random-access memory (DRAM), circuits for sensing and controlling qubits faster than their decoherence time for at-scale quantum processor. In this work, we evaluate RF performance of 18 nm gate length (L-G) fully depleted silicon-on-insulator (FDSOI) NMOS and PMOS from 300 to 5.5 K operating temperature. We experimentally demonstrate extrapolated peak unity current-gain cutoff frequency (f(T)) of 495/337 GHz (1.35x/1.25x gain over 300 K) and peak maximum oscillation frequency (f(MAX)) of 497/372 GHz (1.3x gain) for NMOS/PMOS, respectively, at 5.5 K. A small-signal equivalent model is developed to enable design-space exploration of RF circuits at cryogenic temperature and identify the temperature-dependent and temperature-invariant components of the extrinsic and the intrinsic FET. Finally, performance benchmarking reveals that 22 nm FDSOI cryogenic RF CMOS provides a viable option for achieving superior analog performance with giga-scale transistor integration density.
Más información
Título según WOS: | ID WOS:000730529800005 Not found in local WOS DB |
Título de la Revista: | IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS |
Volumen: | 7 |
Número: | 2 |
Editorial: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Fecha de publicación: | 2021 |
Página de inicio: | 184 |
Página final: | 192 |
DOI: |
10.1109/JXCDC.2021.3131144 |
Notas: | ISI |