Abstract

This paper presents a real-time implementation of a generalized approach for generating pulse-width-modulated (PWM) patterns for three-phase current source topologies that provide: (a) unconstrained selective harmonic elimination (SHE) and (b) fundamental current control. More importantly, the implementation allows the modulation index, phase, frequency, and the number of eliminated harmonics to be updated within a switching period. The approach uses the chopping angles or gating patterns developed for voltage source topologies in combination with a logic circuit, which provides naturally and symmetrically distributed shorting pulses. Thus, the approach avoids the (a) positioning the shorting pulses and (b) defining and solving a set of non-linear equations dedicated to current source topologies. Moreover, the approach can eliminate an even or odd arbitrary number of harmonics. This is an improvement on existing techniques and a new approach to pattern generation. The approach is implemented on a DSP-based system and optimized for minimum computation time and minimum memory requirements. Experimental results for both static and dynamic operating conditions confirm the theoretical considerations.