Competitive learning with floating-gate circuits
Abstract
Competitive learning is a general technique for training clustering and classification networks. We have developed an 11-transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive-learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive-learning circuit that clusters one-dimensional (I-D) data. We then illustrate a general architecture based on the automaximizing bump circuit; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35-mum CMOS process.
Más información
Título según WOS: | ID WOS:000175514000018 Not found in local WOS DB |
Título de la Revista: | IEEE TRANSACTIONS ON NEURAL NETWORKS |
Volumen: | 13 |
Número: | 3 |
Editorial: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Fecha de publicación: | 2002 |
Página de inicio: | 732 |
Página final: | 744 |
DOI: |
10.1109/TNN.2002.1000139 |
Notas: | ISI |