A 19.2GOPS, 20mW adaptive FIR filter
Abstract
We implemented a 48-tap, mixed-signal adaptive FIR filter with 8-bit input and 10-bit output resolution. The filter stores its tap weights in nonvolatile analog memory cells and adapts using the Least-Mean-Square (LMS) algorithm. We run the input through a digital tapped delay line, multiply the digital words with the analog tap weights using mixed-signal multipliers, and adapt the tap coefficients using pulse-based feedback. The accuracy of the weight updates exceeds 13 bits. The total die area is 2.6mm(2) in a 0.35 mum CMOS process. The filter delivers a performance of 19.2GOPS at 200MHz, and consumes 20mW providing a 6mA differential output current.
Más información
Título según WOS: | ID WOS:000189296900122 Not found in local WOS DB |
Título de la Revista: | ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE |
Editorial: | IEEE |
Fecha de publicación: | 2003 |
Página de inicio: | 509 |
Página final: | 512 |
DOI: |
10.1109/ESSCIRC.2003.1257184 |
Notas: | ISI |