Design, Analysis, and Discussion of Short Circuit and Overload Gate-Driver Dual-Protection Scheme for 1.2-kV, 400-A SiC MOSFET Modules

Sun, Keyao; Wang, Jun; Burgos, Rolando; Boroyevich, Dushan

Abstract

This paper proposes short circuit and overload gate-driver dual-protection scheme based on the parasitic inductance between the Kelvin- and power-source terminals of high-current SiC mosfet modules. The paper presents a comprehensive analysis of the two schemes in question, including worst-case analysis used to assess their parametric dependence due to manufacturing tolerances and temperature variations, as well as the in-depth design procedure that can be generally applied to any power module containing a Kelvin-source. For verification, a compact 1.2-kV, 400-A half-bridge module integrating the two protection circuits was developed. The results obtained demonstrate a response time within tens of nanoseconds, and effectively validate their functionality under short circuit and overload scenarios. Finally, a 100-kW, 400-V dc three-phase voltage-source inverter was used to demonstrate the gate-driver with integrated protection functions under 105 degrees C ambient temperature conditions.

Más información

Título según WOS: ID WOS:000507286000071 Not found in local WOS DB
Título de la Revista: IEEE TRANSACTIONS ON POWER ELECTRONICS
Volumen: 35
Número: 3
Editorial: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Fecha de publicación: 2020
Página de inicio: 3054
Página final: 3068
DOI:

10.1109/TPEL.2019.2930048

Notas: ISI