Computation Reduction for Balancing the Voltages of the DC-link Capacitors in 3-level Inverter by Using Redundant Switching States

Davari, S. Alireza; IEEE

Abstract

In finite set model predictive control (FS-MPC) the computational burden increases due to the placement of each of voltage vectors in the cost function. In addition, the higher the number of levels results in the higher the computation rate. For this reason, by reducing candidates number for the cost function, the computational burden can be reduced. On the other hand, in the structure of the neutral point clamped (NPC) inverter, it is necessary to maintain the voltage balance between the capacitors. Balancing methods also increase the computational burden by adding an extra term to the cost function. This paper states a method to reduce the computational burden of a three-level NPC inverter in which the voltage balance of the capacitors is also considered. To reduce the computational burden in this method, only three voltage vectors are included in the cost function. Redundancy states have also been used to balance the voltage of the capacitors. The proposed method is evaluated using simulation.

Más información

Título según WOS: Computation Reduction for Balancing the Voltages of the DC-link Capacitors in 3-level Inverter by Using Redundant Switching States
Título de la Revista: 2020 11TH POWER ELECTRONICS, DRIVE SYSTEMS, AND TECHNOLOGIES CONFERENCE (PEDSTC)
Editorial: IEEE
Fecha de publicación: 2021
Página de inicio: 215
Página final: 220
DOI:

10.1109/PEDSTC52094.2021.9405840

Notas: ISI