I.vourkas_photo_profile.jpg_thumb90

Ioannis Vourkas

Associate Professor

Democritus University of Thrace

Xanthi, Grecia

Líneas de Investigación


Memristor, Memristive Devices and Systems. Resistive Switching Devices and ReRAM. Unconventional, bio-inspired, and Neuromorphic Computing Cellular Automata-based Computing Models

Educación

  •  Electrical and Computer Engineering, DEMOCRITUS UNIVERSITY OF THRACE. Grecia, 2008
  •  Electrical and Computer Engineering, DEMOCRITUS UNIVERSITY OF THRACE. Grecia, 2014

Experiencia Académica

  •   Teaching Assistant Part Time

    DEMOCRITUS UNIVERSITY OF THRACE

    Xanthi, Grecia

    2010 - 2014

  •   Postdoc Full Time

    PONTIFICIA UNIVERSIDAD CATOLICA DE CHILE

    Faculty of Engineering

    Santiago, Chile

    2015 - 2017

  •   Assistant Professor Full Time

    UNIVERSIDAD TECNICA FEDERICO SANTA MARIA

    Valparaíso, Chile

    2017 - 2021

  •   Associate Professor Full Time

    UNIVERSIDAD TECNICA FEDERICO SANTA MARIA

    Valparaíso, Chile

    2021 - 2024

  •   Associate Professor Full Time

    DEMOCRITUS UNIVERSITY OF THRACE

    Xanthi, Grecia

    2024 - A la fecha

Experiencia Profesional

  •   Summer intern Full Time

    Cultural and Educational Technology Institute, Xanthi, Greece

    Xanthi, Grecia

    2006 - 2006

  •   Software developer Full Time

    Institute of Industrial and Control Engineering, UPC, Barcelona

    Barcelona, España

    2009 - 2009

  •   Local Area Network (LAN) Administrator Part Time

    Military Headquarters of Kozani

    Kozani, Grecia

    2010 - 2010

Premios y Distinciones

  •   Best PhD Student Award

    DEMOCRITUS UNIVERSITY OF THRACE

    Grecia, 2015

    In early 2015, I received the Best Ph.D. student award from the Department of Electrical & Computer Engineering (ECE) of the Democritus University of Thrace (DUTh), for finishing my studies with high quality scientific publications and high average grade in the postgraduate courses.


 

Article (73)

A Gate-Level Power Estimation Approach with a Comprehensive Definition of Thresholds for Classification and Filtering of Inertial Glitch Pulses
A Star Network of Bipolar Memristive Devices Enables Sensing and Temporal Computing
An Advanced Memory WRITE Algorithm to Mitigate the Effects of ReRAM Cell Variability
Conditional and Multi-level WRITE Operations on Current-controlled Memristive Devices for Neuromorphic Applications
Design and Simulation of a Hyperdimensional Computing System with Memristive Associative Memory for Image Classification
Hardware Design Strategies Oriented to Edge Computing and AgriFood Electronics for Image Processing using Cellular Automata
On the HW Design of a Memory Control Unit Oriented to the Resistive Memory Technology
A Comprehensive Simulation Framework to Validate Progressive Read-Monitored Write Schemes for ReRAM
A TCAD model for silicon nitride based memristive devices
An Algorithmic Approach to the Design of a Comprehensive ReRAM Memory Controller
Compact Time-Based Sensor-to-Digital Converters in Skywater 130nm Open-Source Technology
Current Driven Random Exploration of Resistive Switching Devices, an Opportunity to Improve Bit Error Ratio
Design Exploration of Threshold Logic in Memory and Experimental Implementation using Knowm Memristors
Effective Current-Driven Memory Operations for Low-Power ReRAM Applications
HW Implementation of Cellular Automata Models Supporting AgriFood Quality Control Processes
Memristors in Cellular-Automata-Based Computing: A Review
On the Development of Prognostics and System Health Management (PHM) Techniques for ReRAM Applications
RevI-Ve: A Comprehensive Software Interface for Easy ReRAM Device Characterization
Trading Parallelism for Resources in the FPGA Implementation of Cellular Automata-based Models
Using Current to Drive Two SDC Memristors Connected in Series and in Anti-Series
A Circuit-Level SPICE Modeling Strategy for the Simulation of Behavioral Variability in ReRAM
Circuit Topology and Synthesis Flow Co-Design for the Development of Computational ReRAM
Design and Simulation of Peripheral Driving Circuitry for Computational ReRAM
Exploring Different Circuit-level Approaches to the Forming of Resistive Random Access Memories
On the Design and Development of a ReRAM-based Computational Memory Prototype
Reliability-Aware Ratioed Logic Operations for Energy-Efficient Computational ReRAM
Stochastic Resonance Exploration in Current-driven ReRAM Devices
Design Considerations for the Development of Computational Resistive Memories
Design Steps towards a MCU-based Instrumentation System for Memristor-based Crossbar Arrays
Robust Circuit and System Design for General-Purpose Computational Resistive Memories
A Voltage-driven Window Function Concept for Behavioral Memristor Device Modeling
Alternative memristor-based interconnect topologies for fast adaptive synchronization of chaotic circuits
Cellular automata coupled with memristor devices: A fine unconventional computing paradigm
Comprehensive predictive modeling of resistive switching devices using a bias-dependent window function approach
Exploring the “resistance change per energy unit” as universal performance parameter for resistive switching devices
On the Development of MCU-based ad hoc HW Interface Circuitry for Memristor Characterization
Performance Assessment of Memristor Networks as Shortest Path Problem Solvers
ReRAM-based Ratioed Combinational Circuit Design: a Solution for in-Memory Computing
Shortest Path Computing in Directed Graphs with Weighted Edges Mapped on Random Networks of Memristors
Voltage Divider for Self-Limited Analog State Programing of Memristors
Exploring Memristor Multi-Level Tuning Dependencies on the Applied Pulse Properties via a Low Cost Instrumentation Setup
Memristive Logic in Crossbar Memory Arrays: Variability-Aware Design for Higher Reliability
Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator
Massively Parallel Analog Computing: Ariadne's Thread Was Made of Memristors
1-D memristor-based cellular automaton for pseudo-random number generation
An on-line test strategy and analysis for a 1T1R crossbar memory
Crossbar-Based Memristive Logic-in-Memory Architecture
Memristor Crossbar for Adaptive Synchronization
Modeling Physarum space exploration using memristors
Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations
2T1M-Based Double Memristive Crossbar Architecture for In-Memory Computing
Alternative Architectures Toward Reliable Memristive Crossbar Memories
Emerging Memristor-Based Logic Circuit Design Approaches: A Review
Memristor-Based Nanoelectronic Computing Circuits and Architectures
Employing threshold-based behavior and network dynamics for the creation of memristive logic circuits and architectures
LC Filters with Enhanced Memristive Damping
Live Demonstration: XbarSim: An Educational Simulation Tool for Memristive Crossbar-Based Circuits
Multi-state Memristive Nanocrossbar for High-Radix Computer Arithmetic Systems
SPICE modeling of nonlinear memristive behavior
XbarSim: An Educational Simulation Tool for Memristive Crossbar-Based Circuits
Boolean Logic Operations and Computing Circuits Based on Memristors
Memristor-based combinational circuits: A design methodology for encoders/decoders
Memristor-based parallel sorting approach using one-dimensional cellular automata
Nano-Crossbar Memories Comprising Parallel/Serial Complementary Memristive Switches
On the generalization of composite memristive network structures for computational analog/digital circuits and systems
Shortest Path Computing Using Memristor-Based Circuits and Cellular Automata
Study of Memristive Elements Networks
Improved Read Voltage Margins with Alternative Topologies for Memristor-based Crossbar Memories
On the Analog Computational Characteristics of Memristive Networks
Recent Progress and Patents on Computational Structures and Methods with Memristive Devices
A Novel Design and Modeling Paradigm for Memristor-Based Crossbar Circuits
FPGA based Cellular Automata for Environmental Modeling
Spreading Patterns of Mobile Phone Viruses Using Cellular Automata

ConferencePaper (13)

FPGA Implementation of an Elementary ReRAM Memory Control Unit
On the Variability-aware Design of Memristor-based Logic Circuits
Stuck-at-OFF Fault Analysis in Memristor-Based Architecture for Synchronization
Coupled Physarum-Inspired Memristor Oscillators for Neuron-like Operations
Experimental measurements on resistive switching devices: Gaining hands-on experience
Memristive Cellular Automata for Modeling of Epileptic Brain Activity
Resistive Switching Behavior seen from the Energy Point of View
Variability-tolerant memristor-based ratioed logic in crossbar array
Experience on material implication computing with an electromechanical memristor emulator
Exploring the voltage divider approach for accurate memristor state tuning
Towards memristive crossbar-based neuromorphic HW accelerators for signal processing
A Digital Memristor Emulator for FPGA-Based Artificial Neural Networks
A Memristive Circular Buffer for Real-Time Signal Processing

EditorialMaterial (2)

Meet the editors
Special issue on Advances in Memristive Networks

Proyecto (2)

Reservoir Computing con Redes de Memristors
Memristive Neural Computing & Learning Architectures (CLeArMeNu)
4
Angel Abusleme

Associate Professor

Department of Electrical Engineering

Pontificia Universidad Católica de Chile

Santiago, Chile

2
Marcelo Pérez

Profesor Asociado

Electronics

Universidad Tecnica Federico Santa Maria

Valparaiso, Chile

87
Ioannis Vourkas

Associate Professor

Department of Electrical and Computer Engineering

Democritus University of Thrace

Xanthi, Grecia

3
Angel Abusleme

Associate Professor

Electrical Engineering

Pontificia Universidad Catolica de Chile

Santiago, Chile

4
Jorge Gómez

Profesor Asistente

Ingeniería

Universidad de Los Andes

Santiago, Chile